The TPS3613-01 supervisory circuit monitors and controls processor activity by providing backup-battery switchover for data retention of CMOS RAM.

During power-on, reset (RESET and RESET) is asserted when the supply voltage (V_DD or V_BAT) becomes higher than 1.1 V.

Thereafter, the supply voltage supervisor monitors V_DD at the SENSE pin through external feedback resistors and keeps reset active as long as SENSE remains below the threshold voltage, V_IT.

An internal timer delays the release of the reset state to ensure proper system reset. The delay time starts after SENSE rises above the threshold voltage, V_IT.

When SENSE drops below V_IT, reset becomes active again.

The TPS3613-01 is available in a 10-pin MSOP package and is characterized for operation over a temperature range of –40°C to +85°C.