CMOS模擬集成電路設計主要是基于操作電荷。開關和電容是使用的元素控制和分發(fā)費用。整體式過濾器，數(shù)據(jù)轉換器和電壓轉換器依靠優(yōu)秀CMOS開關的特性。因為重要性在他們的電路開關，CMOS設計師發(fā)展的技術，以盡量減少開關引起的錯誤，特別是那些與雜散電容和開關時間。到現(xiàn)在為止，這些技術已被使用只有在單片器件內(nèi)部結構。一新的設備，LTC1043，使得這些開關板級使用。多極開關與自驅動，非重疊時鐘允許在電路中使用的設備這是不切實際的與其他開關。

　　Conceptually， the LTC1043 is simple. Figure 1 details its features. The oscillator， free-running at 200kHz， drives a non-overlapping clock. Placing a capacitor from Pin 16 to ground shifts the oscillator frequency downward to any desired point. The pin may also be driven from an external source， synchronizing the switches to external circuitry. A non-overlapping clock controls both DPDT switch sections. The non-overlapping drive prevents simultaneous conduction in the series connected switch sections.

　　Charge balancing circuitry cancels the effects of stray capacitance. Pins 1 and 10 may be used as guard points for Pins 3 and 12 in particularly sensitive applications