5.1.12FSM.............................36
5.1.11Comments...........................36
5.1.10Macros............................. 36
5.1.9Combinatorial Vs Sequential Logic................... 35
5.1.8Assignment...........................34
5.1.7Writing functions.........................33
5.1.6case 語(yǔ)句............................. 33
5.1.5IF 語(yǔ)句.............................32
5.1.4Expressions...........................31
5.1.3Net and Register.......................... 31
5.1.2Modules............................29
28
5.1.1選擇有意義的信號(hào)和變量名對(duì)設(shè)計(jì)是十分重要的命名包含信號(hào)或變
量諸如出處有效狀態(tài)等基本含義下面給出一些命名的規(guī)則......... .
5.1Verilog 編碼風(fēng)格...........................28
5規(guī)范內(nèi)容...............................28
4引用標(biāo)準(zhǔn)和參考資料........................... 28
3定義.................................28
2范圍.................................28
1目的.................................28
第二章VERILOG語(yǔ)言編寫(xiě)規(guī)范........................ 28
8.5 參數(shù)化元件實(shí)例...........................26
8.4 程序包書(shū)寫(xiě)實(shí)例...........................25
8.3 函數(shù)書(shū)寫(xiě)實(shí)例............................ 24
8.2 VHDL 編寫(xiě)范例...........................22
8.1 VHDL保留字............................22
8附錄.................................22
7.5 多賦值語(yǔ)句案例三態(tài)總線(xiàn)....................... 21
7.4 避免使用Latch...........................20
7.3 考慮綜合的執(zhí)行時(shí)間.........................20
7.2組合邏輯描述的多種方式..... ...................20
7.1 資源共享問(wèn)題............................ 19
7 代碼編寫(xiě)中容易出現(xiàn)的問(wèn)題........................19
6代碼模塊劃分.............................. 18
5.1.13 TAB鍵間隔...........................18
5.1.12Comments...........................18
5.1.11 FSM 有限狀態(tài)機(jī)........................ 18
5.1.10package............................18
5.1.9 類(lèi)屬( generics).......................... 17
5.1.8 procedure............................ 17
5.1.7 function............................16
5.1.6 運(yùn)算符(operator).........................16
5.1.5 語(yǔ)句..............................12
5.1.4實(shí)體..............................10
5.1.3 信號(hào)和變量............................ 9
5.1.2數(shù)據(jù)對(duì)象和類(lèi)型..........................9
5.1.1標(biāo)識(shí)符Identifiers)命名習(xí)慣...................... 8
5.1 VHDL編碼風(fēng)格............................ 7
5規(guī)范內(nèi)容................................ 7
4引用標(biāo)準(zhǔn)和參考資料...........................7
3定義.................................. 7
2范圍.................................. 7
1目的.................................. 7