專(zhuān)注于單片機(jī)外圍設(shè)備：USB音頻橋簡(jiǎn)化嵌入式多媒體設(shè)計(jì)

　　Now that the humble universal serial bus （USB） has become the de facto interface for virtually every type of consumer gear， there is growing interest in applying its capabilities to audio interfaces. In this article， we will explore a new category of USB bridge devices emerging that can handle many of the details required to support Audio Devices Class applications in hardware. As we will demonstrate， USB’s ample bandwidth， ease of use， and simple control structure make it a natural choice for exchanging and controlling digital high-quality audio streams

　　雖然USB音頻很簡(jiǎn)單，從消費(fèi)者的角度來(lái)看，它不是那么容易的連接器的另一邊。這在很大程度上是因?yàn)閁SB協(xié)議棧出奇的復(fù)雜，能夠支持許多不同類(lèi)型的應(yīng)用程序，正式地稱(chēng)為USB類(lèi)。這包括音頻設(shè)備類(lèi)，它定義了一個(gè)通過(guò)USB傳輸音頻的健壯標(biāo)準(zhǔn)化機(jī)制。從配送、存儲(chǔ)的USB端口提取音頻數(shù)據(jù)，或進(jìn)一步處理由應(yīng)用程序的單片機(jī)往往需要牢固掌握USB協(xié)議層的細(xì)節(jié)（了解更多關(guān)于USB協(xié)議本身，看到高新區(qū)第”的提示，使用USB嵌入式應(yīng)用技巧第一部分”）。除了協(xié)議本身的復(fù)雜性之外，其他與音頻相關(guān)的問(wèn)題，如數(shù)據(jù)流同步和編程編解碼器以及數(shù)字/模擬轉(zhuǎn)換器（DAC）配置，甚至可以挑戰(zhàn)最有經(jīng)驗(yàn)的嵌入式和音頻設(shè)計(jì)器。

　　To address these issues， devices like Silicon Labs’ CP2114 audio bridge supports the synchronization， stream management， and other tasks that would normally require a significant software development effort. In this article， we will also look at a few ways USB audio bridges provide a novel standard audio configuration interface and methods to synchronize audio data streams in a low-cost， highly integrated single-chip solution.

　　One of the biggest challenges involved with streaming audio over USB is the synchronization of data streams from the host （source） to the device （sink）。 Although USB was originally developed as a simple interface for connecting keyboards， mice and printers， its protocol specification also includes a robust synchronization scheme for “isochronous transfers.” The Audio Device Class definition employs this scheme to transport audio data reliably over the bus. However， the implementation of this mechanism is not a trivial task， and previous implementations have usually been built around relatively powerful embedded systems that included complex data rate converters or expensive phase-locked loops （PLLs） to support the clock accuracy requirements.